FIELD OF THE INVENTION
The invention lies in the integrated technology field. More specifically, the invention relates to an integrated memory having cells of the 2-transistor/2-capacitor type.
U.S. Pat. No. 5,381,364 discloses an FRAM, i.e. FeRAM, type memory (ferroelectric random access memory) with cells of that type. In FRAMs, the memory capacitors comprise a ferro-electrical dielectric. An electrode of the two memory capacitors of each memory cell is connected to a respective bit line of a bit line pair via the controllable system of the appertaining selecting transistor. Control terminals of the two selecting transistors are connected to a common word line. The second electrodes of the two memory capacitors of each memory cell are connected to a common plate line. As a result, the potential at these electrodes of the memory capacitors is always the same during the operation of the memory.